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The gate oxide is the dielectric layer that separates the gate terminal of a MOSFET (metal-oxide-semiconductor field-effect transistor) from the underlying source and drain terminals as well as the conductive channel that connects source and drain when the transistor is turned on. Gate oxide is formed by thermal oxidation of the silicon of the channel to form a thin (5 - 200 nm) insulating layer of silicon dioxide. The insulating silicon dioxide layer is formed through a process of self-limiting oxidation, which is described by the Deal–Grove model. A conductive gate material is subsequently deposited over the gate oxide to form the transistor. The gate oxide serves as the dielectric layer so that the gate can sustain as high as 1 to 5 MV/cm transverse electric field in order to strongly m

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  • Òxid de porta (ca)
  • Gate oxide (en)
  • 栅氧化层 (zh)
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  • 栅氧化层(英語:gate oxide),是用来把CMOS与下方、以及源漏极间导电沟道隔离开来的氧化介质层(如右图)。通过将沟道上方的硅氧化为二氧化硅,栅氧化层得以形成,其厚度大约为5到200纳米,这层物质为绝缘体。栅氧化层上方为导电的栅极材料。栅氧化层充当了介质层,使得栅极能够维持1到5毫伏每立方米的纵向电场,这个电场可以用来控制下方沟道的导通和关断。 (zh)
  • The gate oxide is the dielectric layer that separates the gate terminal of a MOSFET (metal-oxide-semiconductor field-effect transistor) from the underlying source and drain terminals as well as the conductive channel that connects source and drain when the transistor is turned on. Gate oxide is formed by thermal oxidation of the silicon of the channel to form a thin (5 - 200 nm) insulating layer of silicon dioxide. The insulating silicon dioxide layer is formed through a process of self-limiting oxidation, which is described by the Deal–Grove model. A conductive gate material is subsequently deposited over the gate oxide to form the transistor. The gate oxide serves as the dielectric layer so that the gate can sustain as high as 1 to 5 MV/cm transverse electric field in order to strongly m (en)
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  • The gate oxide is the dielectric layer that separates the gate terminal of a MOSFET (metal-oxide-semiconductor field-effect transistor) from the underlying source and drain terminals as well as the conductive channel that connects source and drain when the transistor is turned on. Gate oxide is formed by thermal oxidation of the silicon of the channel to form a thin (5 - 200 nm) insulating layer of silicon dioxide. The insulating silicon dioxide layer is formed through a process of self-limiting oxidation, which is described by the Deal–Grove model. A conductive gate material is subsequently deposited over the gate oxide to form the transistor. The gate oxide serves as the dielectric layer so that the gate can sustain as high as 1 to 5 MV/cm transverse electric field in order to strongly modulate the conductance of the channel. Above the gate oxide is a thin electrode layer made of a conductor which can be aluminium, a highly doped silicon, a refractory metal such as tungsten, a silicide or a sandwich of these layers. This gate electrode is often called "gate metal" or "gate conductor". The geometrical width of the gate conductor electrode (the direction transverse to current flow) is called the physical gate width. The physical gate width may be slightly different from the electrical channel width used to model the transistor as fringing electric fields can exert an influence on conductors that are not immediately below the gate. The electrical properties of the gate oxide are critical to the formation of the conductive channel region below the gate. In NMOS-type devices, the zone beneath the gate oxide is a thin n-type inversion layer on the surface of the p-type semiconductor substrate. It is induced by the oxide electric field from the applied gate voltage VG. This is known as the inversion channel. It is the conduction channel that allows the electrons to flow from the source to the drain. Overstressing the gate oxide layer, a common failure mode of MOS devices, may lead to gate rupture or to stress induced leakage current. During manufacturing by reactive-ion-etching the gate oxide may damaged by antenna effect. (en)
  • 栅氧化层(英語:gate oxide),是用来把CMOS与下方、以及源漏极间导电沟道隔离开来的氧化介质层(如右图)。通过将沟道上方的硅氧化为二氧化硅,栅氧化层得以形成,其厚度大约为5到200纳米,这层物质为绝缘体。栅氧化层上方为导电的栅极材料。栅氧化层充当了介质层,使得栅极能够维持1到5毫伏每立方米的纵向电场,这个电场可以用来控制下方沟道的导通和关断。 (zh)
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